2001 International Semiconductor Conference

2001 International Semiconductor Conference

4.11 - 1251 ratings - Source



For our analysis we used the following adder models: Ripple Carry Adder, Two Level Carry Select Adder, Brent aamp; Kung ... The number of bits will be restricted to usual numbers: 8, 16, 32, 64, 128 bits. Because of the modularity of the parallel prefix structure, it is easy to implement adder structures in VHDL/Verilog or simply byanbsp;...


Title:2001 International Semiconductor Conference
Author: IEEE, National Institute for Research and Development in Microtechnologies, National Institute for Research and Development in Microtechnologies (Romania), Institute of Electrical and Electronics Engineers, National Institute for Research and Development in Microtechnologies (Bucarest), National Institute for Research and Development in Microtechnologies (Romania).
Publisher:IEEE - 2001
ISBN-13:

You must register with us as either a Registered User before you can Download this Book. You'll be greeted by a simple sign-up page.

Once you have finished the sign-up process, you will be redirected to your download Book page.

How it works:
  • 1. Register a free 1 month Trial Account.
  • 2. Download as many books as you like (Personal use)
  • 3. Cancel the membership at any time if not satisfied.


Click button below to register and download Ebook
Privacy Policy | Contact | DMCA