Proceedings of the Third International Workshop on Hardware/Software Codesign
The RAM memory required for program/data storage shares with coprocessors the main data bus but can be accessed only by the CPU core. ... The VHDL code generator translates the internal representation of each FSM into a VHDL template complying to the guidelines for ... The VIS is defined in terms of a register-oriented machine supporting unsigned/signed integer data types (8, 16 and 32 bits) asanbsp;...
| Title | : | Proceedings of the Third International Workshop on Hardware/Software Codesign |
| Author | : | IEEE Computer Society. Technical Committee on Design Automation, IEEE Computer Society. Design Automation Technical Committee |
| Publisher | : | IEEE - 1994 |
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